Posted: April 20th, 2022

VeRiLoG EaSy ISE project, or worst case, verilog on any other compiler

Question description

VERILOG design a sample car wash, 3 packages 1basic, 2extra, and 3platinum, 1basic = SFsoapfoam, Cscrubbers, RIrinse 2extra = PSpresoak, C, SF, C, RI3platinum = PS, C, SF, C, RI, UUwax, C, RI, Ddryer, RSrepelshield, SHtireshineDesign pack by calling substate options, for example  1basic = goto state0 SF, then goto state1 C, goto state2 RI 2extra goto state4 PS, goto state1 C etc Start when $$ inserted (simple yes no switch) and wash pack selected (3 option switch), display package # via mealy output, after cycle done, display sum of last 4 digits of id using 7763 For Example, a team has the IDs 80-210523 and 80-213466 so this should display the decimal number 9), then reset to start, displaying –, also add emergency reset button, assign buttons and switches as BTN3=Money Paid BTN0 = resetsystem SW7 = Basic washing program.SW6 =Extracleaningprogram.SW5 = Platinum program1.Assume that only one button and switch pressed at a time.2.Assume the customer inserts the right amount of money all the time, so only yes no $ switch3.Use CLKsignal synchronizing clock with a frequency f = 0.5HZ.

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